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Espressif Systems /ESP32-H2 /MCPWM0 /TIMER0_SYNC

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Interpret as TIMER0_SYNC

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIMER0_SYNCI_EN)TIMER0_SYNCI_EN 0 (SW)SW 0TIMER0_SYNCO_SEL 0TIMER0_PHASE0 (TIMER0_PHASE_DIRECTION)TIMER0_PHASE_DIRECTION

Description

PWM timer0 sync function configuration register.

Fields

TIMER0_SYNCI_EN

When set, timer reloading with phase on sync input event is enabled.
SW

Toggling this bit will trigger a software sync.
TIMER0_SYNCO_SEL

PWM timer0 sync_out selection, 0: sync_in, 1: TEZ, 2: TEP, and sync out will always generate when toggling the reg_timer0_sync_sw bit
TIMER0_PHASE

phase for timer reload on sync event
TIMER0_PHASE_DIRECTION

Configure the PWM timer0’s direction when timer0 mode is up-down mode: 0-increase,1-decrease

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data